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Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr_Gerbers/precadsr-F_Cu.gbr Normal file View File Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_Mask.gbr Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_16mm_Single_Vertical.kicad_mod Normal file Unescape Dual_VCA.diy Normal file Unescape Dual_VCA.diy Normal file View File Schematics/Luthers_VCO_schematic.pdf Normal file View File Images/PXL_20210831_001017829.jpg Normal file Unescape and there have been.

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