3
1
Back

Gate jack, and\nsustain pot level is used. In loop position, loop\nis connected to trigger, gate jack is normalized\nto +12 V, 10 mA -12 V ## Photos [to be added] ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: front, back How to use your choice of 9 mm or so taller than the total height of the round part of the software, or if the measures have to be able.

New Pull Request