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Added] ## Documentation: ### Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ## GitHub repository https://github.com/holmesrichards/precadsr Submodules Latest commits for file Docs/precadsr_layout_front.pdf Panels/dual_vca.scad Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Power_Header.kicad_mod Normal file View File 3D Printing/6u_wing_v1.scad Normal file Unescape Hardware/Panel/precadsr_panel_al/fp-lib-table Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RA6020F_Single_Slide.kicad_mod Normal file View File Datasheets/BC546A-MCC.pdf Executable file View File 3D Printing/Pot_Knobs/Pot3.STL Executable file View File 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels' 2cbdb94ba9 Go to file 53c46eece1 Still trying to implement chaining Schematics/Unseen Servant/Unseen Servant_slider_board_noncanonical.kicad_pcb ## Current draw From b886abe4036c263df71a7c0b70fd44b77a53e633 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces "silk_line_width": 0.15, "silk_text_italic": false, "silk_text_size_h": 1.0, "silk_text_size_v": 1.0, "silk_text_thickness": 0.15, "silk_text_upright": false, "zones": { "min_clearance": 0.5 } }, updates to rev 2 beta by adding +5V, and both trigger/gate and CV routing updates led holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf 25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf 25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm 25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch.

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