synth_tools

Back

LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Latest commits for file Fireball/Fireball.kicad_pcb tweaks layout with input from sam 32 "B.Adhes" user "B.Adhesive" (33 "F.Adhes" user "F.Adhesive" 36 "B.SilkS" user "B.Silkscreen" (37 "F.SilkS" user "F.Silkscreen" (38 "B.Mask" user (39 F.Mask user (40 Dwgs.User user hide (35 F.Paste user (36 "B.SilkS" user "B.Silkscreen" (37 "F.SilkS" user "F.Silkscreen" 40 "Dwgs.User" user "User.Drawings" (41 "Cmts.User" user "User.Comments" (42 "Eco1.User" user "User.Eco1" 43 "Eco2.User" user "User.Eco2" (44 "Edge.Cuts" user (45 "Margin" user (46 B.CrtYd user (47 F.CrtYd user (48 B.Fab user hide (48 B.Fab user hide From d48d677c9103ec90137a6830434841a576342e9a Mon Sep 17 00:00:00 2001 Subject: [PATCH] Delete '3D Printing/Panels/HOLD PORTAL.png' bfe3829b0b Wondermark fix; added Oatmeal initial Binary files /dev/null and b/Panels/luther_triangle_10hp.stl differ Binary files /dev/null and b/Docs/precadsr_layout_front.pdf differ Tayda 6096366E - 2 pin Molex connector 2.54 mm spacing | Tayda | A-3588 | | C1 | 1 | TL074 | Quad Low-Noise JFET-Input Operational Amplifiers, DIP-8/SOIC-8/TSSOP-8/VSSOP-8 Binary files a/3D Printing/Panels/HOLD PORTAL.png and /dev/null differ QuentinEF.ttf Normal file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/COLOR SPRAY.png create mode 100644 3D Printing/Panels/Radio_shaek_standoff.stl Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/CP_Radial_D6.3mm_P2.50mm.kicad_mod Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical.kicad_mod Normal file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Trimmer_Pot_Hole.kicad_mod Normal file View File 3D Printing/Jigs/eurorack_test_jig_150mm.stl Executable file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_LED_Hole_NPTH.kicad_mod Normal file View File 3D Printing/Pot_Knobs/FS_PotiKnob_d6D12h9.stl Executable file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/BLADE BARRIER.png differ Binary files /dev/null and b/3D Printing/Panels/image.png differ From 2dd0b8c0c736720a0b064bbe1304dc9562beb260 Mon Sep 17 00:00:00 2001 .../Panels/MAGIC MOUTH.png | Bin 0 -> 163520 bytes Images/IMG_6777.JPG | Bin 0 -> 74084 bytes Docs/precadsr_layout_front.pdf | Bin 0 -> 10174 bytes .../Panels/PRISMATIC SPHERE.png | Bin 0 -> 90091 bytes Latest commits for file Images/PXL_20210831_002553634.jpg main synth_tools/README.md 0 lines Latest commits for file Schematics/Dual_VCA_with_cv2.diy Add radio shaek with cv2 version Add radio shaek with cv2 version From d6ebbf1c1b28130c9d340e0b0f0f06a7bc1cfd83 Mon Sep 17 00:00:00 2001 eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke 3583986e89 Finished PCB, passes all passable DRCs Show-stopping bugs needing bodges: Errant connection between R25 and R1. This needs to be larger than the cost of distribution to the PSU? -Consider: 1 simple on/off switch/button/knob/etc. Bab77fac9d Add befaco image.

New Pull Request

Labels Milestones