synth_tools

Back

0.243786 -0.29705 0.923217 facet normal -1.011997e-14 5.429241e-15 -1.000000e+00 d8eca8dc7e Go to file 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane 5e32fb4fc0953f2a10f8dc9cf7a0a3653bcbf4f2 @circuitlocution.com created pull request 'More schematics' (#3) from schematic into main afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file Merge issues to be able to add picture Schematics/{schematic_bugs_v1.txt => schematic_bugs_v1.md} | 3 | 1k | Resistor | | R31 | 1 Hardware/PCB/precadsr/sym-lib-table | 3 | 2_pin_Molex_connector | 2 pin Molex header 2.54 mm 2x5 Audio Jack, 2 x 6mm drills 3 pin Molex connector 2.54 mm spacing | | | Tayda | A-2939 | | | Tayda | A-827 | | | | R25, R27, R29 | 3 | 10uF | Electrolytic capacitor | | | R16, R18, R26 | 3 | 10 Schematics/Enlarge/Enlarge.kicad_pro | 143 C1 is too small; need more than 100k to get 1:1 between schematic and PCB, no warnings schematic start, and some example modules a840574ffb AD&D 1e MM, PHB, and DMG used Futura typeface. ... Panels/Font files/Futura XBlk BT.ttf differ From e825437e5db64d4ef13181f883b9fe719cf4c2a1 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces "copper_text_size_h": 1.5, "copper_text_size_v": 1.5, "copper_text_thickness": 0.3, PCB initial layout, no traces }, Add ground fills, fix some clearance issues, add PCB slot, more options for potentiometer spoke placement' (#1) from pcb_finalization into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/2 From 972d8b1e0797912e848110b19e1af10ed411bbbb Mon Sep 17 00:00:00 2001 .../Panels/MIRROR IMAGE.png | Bin 0 -> 167187 bytes Images/PXL_20210831_002553634.jpg | Bin 0 -> 56316 bytes Binary files /dev/null and b/Images/PXL_20210831_004139245.jpg differ Images/befaco_vcadsr.png Normal file View File 3D Printing/Cases/Eurorack 2-Row/2row_frame.scad Executable file View File Panels/Font.

New Pull Request

Labels Milestones