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Raster, 3.767x4.229mm package, pitch 0.4mm; http://www.fujitsu.com/global/documents/products/devices/semiconductor/fram/lineup/MB85RS1MT-DS501-00022-7v0-E.pdf Infineon LFBGA-292, 0.35mm pad, 17.0x17.0mm, 292 Ball, 20x20 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=26 ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g431c6.pdf ST WLCSP-49, off-center ball grid, ST die ID 467, 3.09x3.15mm, 52 Ball, X-staggered 13x8 Layout, 0.4mm Pitch, https://www.ti.com/lit/gpn/ina234 Texas Instruments, BGA Microstar Junior, 7x7mm, 113 ball 12x12 grid, NSMD pad definition Appendix A BGA 676 1 FF676 FFG676 FFV676 Kintex-7 and Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=275, NSMD pad definition Appendix A Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=298, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=94, NSMD pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g071eb.pdf ST WLCSP-36, ST die ID 467, 3.09x3.15mm, 52 Ball, X-staggered 7x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb15cc.pdf#page=119 ST WLCSP-52, ST die ID 461, 4.63x4.15mm, 115 Ball, X-staggered 7x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb55vc.pdf ST WLCSP-100, off-center ball grid, ST die ID 464, 2.58x3.07mm, 36 Ball, 6x6 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stulpi01a.pdf TFBGA-64, 8x8 raster, 3.347x3.585mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf VFBGA-49, 7x7, 5x5mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf WLCSP-49, 7x7 raster, 3.89x3.74mm package, pitch 0.8mm; see section 7.1.1 of http://www.st.com/resource/en/datasheet/stm32f401ce.pdf WLCSP-49, 7x7 raster, 2.999x3.185mm package, pitch 0.4mm; see section 10.3 of https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf 44-Lead Plastic Quad Flat, No Lead Package, 1.2x1.8x1.55 mm Body [DFN] (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF DD Package; 8-Lead Plastic DFN (5mm x 5mm) (see http://www.everspin.com/file/236/download DFN8 2x2, 0.5P; No exposed pad 8-Lead Plastic Stretched Small Outline (ST)-4.4 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf VQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/lmh0074.pdf#page=13), generated with kicad-footprint-generator ipc_gullwing_generator.py 10-Lead SSOP, 3.9 x 4.9mm body, 1.00mm pitch (http://www.st.com/resource/en/datasheet/viper01.pdf SSOP 3.9 4.9 1.00 SSOP14: plastic shrink small outline package; 28 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot370-1_po.pdf SSOP56: plastic shrink small outline package; 16 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot556-1_po.pdf 24-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [QFN] with thermal pad TSSOP HTSSOP 0.65 thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf.

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