3
1
Back

Vias and counter-pad, see http://www.ti.com/lit/ds/symlink/tps62177.pdf WSON 0.5 thermal vias in pads, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator Hirose DF13C SMD, CL535-0402-2-51, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator JST VH series connector, B10B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator connector Molex CLIK-Mate.

New Pull Request