10k NTC Thermistor Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Latest commits for branch hard_sync Merge pull request 'pcb_finalization' (#1) from bugfix/10hp into main ... Footprint "SOCKET_3_PIN_HEADER_NORMAL" (version 20211014) (generator pcbnew min_thickness 0.254) (filled_areas_thickness no (end -4.5 -4.5 (end 0.72 -4.5 (end 4.5 -4.4 (hatch full 0.508 (end 1.25 -0.85 (end -2.01 0.85 (end 2 -0.95 (end -2 0.95 (end -0.9 -0.7 (end 0.167621 -0.38 (end 0.167621 -0.38 (end 0.167621 -0.38 (end 0.74 -1.85 (mid 3.936979 2.192817 (end 2.54 2.6 (mid 4.633903 -1.509328 (end 4.864184 -1.122795 (mid 1.143021 2.192818 (end 0.1836 1.098807 (mid 0.446097 -1.509328 (end 6.09 -2.01 (end -1.01 2.73 (end 0.8.
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