Labels Milestones
Back8 2x2 mm 16-Lead Quad Flat, No Lead Package (8MA2) - 2x3x0.6 mm Body [QFN] with thermal vias and counter-pad, see http://www.ti.com/lit/ds/symlink/tps62177.pdf WSON-10 package 2x3mm body, pitch 0.5mm (http://www.analog.com/media/en/package-pcb-resources/package/56702234806764cp_24_3.pdf, http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5801.pdf LFCSP VQ, 24 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (ST)-4.4 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf SSOP28: plastic shrink small outline transistor (see http://www.onsemi.com/pub/Collateral/NST3906F3-D.PDF 3-pin SuperSOT package https://www.fairchildsemi.com/package-drawings/MA/MA03B.pdf 6-pin SuperSOT package http://www.mouser.com/ds/2/149/FMB5551-889214.pdf 8-pin SuperSOT package, http://www.icbank.com/icbank_data/semi_package/ssot8_dim.pdf Power MOSFET package, 3x3mm (see https://www.fairchildsemi.com/datasheets/FD/FDMC8032L.pdf Fairchild-specific MicroPak-6 1.0x1.45mm Pitch 0.5mm USON-20 2x4mm Pitch 0.4mm 8-Lead Plastic PSOP, Exposed Die Pad (see Microchip datasheet http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf MLF.
- Adjust to shift left.
- Vertical, Latch (source: https://suddendocs.samtec.com/prints/t1m-single-row-footprint.pdf TE Connectivity, HDI, Wire-to-Board.