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BackRelay DPDT double dual coil latching through hole 3.3mm, height 6, Wuerth electronics 9774060360 (https://katalog.we-online.de/em/datasheet/9774060360.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LFCSP, 16 Pin package with missing pin 5, row spacing 7.62 mm (300 mils), Socket 22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils 14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), body size 6.7x9.18mm (see e.g. Http://www.ti.com/lit/ds/symlink/drv5023.pdf TO-92L leads in-line (large body variant of MSOP-16 (see http://cds.linear.com/docs/en/datasheet/3630fd.pdf 12-Lead Plastic DFN (5.55mm x 5.2mm), Pin 5-8 connected to trigger, gate jack is normalized\nto +12 V, and sustain voltage is taken from \npot pin 1. Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product date = sam. 04 avril 2015 11:21:18 UTC update=Tue 20 Apr 2021 12:09:41 PM EDT Generated from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 Component Count: 74 Refs C6, C7, C8, C9 | 5 | 100nF | Unpolarized capacitor | | Tayda | A-1955 | | | | | | | Tayda | A-1531 or A-557 | | C7, C11 | 3 | 4.7k | Resistor | | | | | | | | Tayda | A-826 | | | J2 | 1 Kosmo_panel | 1 | ICM7555xP | CMOS General Purpose Timer, 555 compatible, PDIP-8"/>
- -2.5504 5.20733 21.335 facet.
- Knurled_finish(ord, ird, lf, sh.
- Normal -0.0647447 0.0692189 0.995498 facet normal.