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c6741b48f0ef8a6e69ecbca1a47bc4f4b481e2a3 Notes from MK's PCB livestream # Format documentation: https://kicad.org/help/file-formats/ # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *-backups *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes unplated through holes: ============================================================= c9e81f0cc630cea052574ce7c50b3e82145bb626 531ebcae92ad8ad00635060e3583259ee13cc12b f51b7b97734e404127fa5d5d263acbfd66f116e4 Add schematic, start on PCB with on-board components PCB initial layout, no traces "min_copper_edge_clearance": 0.0, PCB initial layout, no traces a3181ad06b Add correct footprints to fireball Minor layout tweaks Finish schematic, add PDF' (#2) from schematic into main afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file new_footprints Added hard sync to schematic, laid out PCB with exploratory 8hp layout b1fcba1e78 Bring in diylc and openscad design Panels/dual_vca.scad | 393 create mode 100644 Hardware/PCB/precadsr_Gerbers/precadsr-Edge_Cuts.gbr create mode 100644 3D Printing/Panels/MAGIC MISSILE VCF.png differ v1.1 Go to file f6c7924538 Messing around with panel title fonts } STLs, 10hp version, others schematics thickness=2; label_inset_height = thickness-0.02; // Width of module.

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