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Holes Total unplated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes Total unplated holes count 16 Not plated through holes are merged with plated holes unplated through holes: ============================================================= c9e81f0cc630cea052574ce7c50b3e82145bb626 Image of caxia score caixa_sr1.png | Bin 0 -> 292501 bytes create mode 100644 HIHAT_MANUAL.pdf create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/LED_D5.0mm.kicad_mod create mode 100644 Hardware/PCB/precadsr_Gerbers/precadsr-job.gbrjob create mode 100644 Panels/luther_triangle_vco_quentin_v2.scad create mode 100644 Schematics/SynthMages.pretty/Alpha Rotary 12.kicad_mod 46 lines Latest commits for file Panels/FireballSpellVertSmaller.png (min_thickness 0.25) (filled_areas_thickness no Latest commits for file Panels/luther_triangle_10hp_rib_space_fixes.stl main MK_VCO/Panels/Font.

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