Labels Milestones
Back0 -0.995037 vertex 0.627597 9.97537 0.0490595 facet normal 0.0980237 -0.995112 -0.0119421 facet normal 4.648440e-001 8.134776e-001 3.495343e-001 facet normal -8.266210e-01 5.627590e-01 1.789245e-04 vertex -9.132857e+01 1.027825e+02 4.255000e+01 vertex -9.435317e+01 1.041514e+02 4.255000e+01 facet normal -0.0817037 -0.0823248 0.993251 vertex 5.59201 4.18951 7.89187 facet normal -0.538413 0.714663 0.446506 facet normal -0.366302 -0.925178 0.0993389 facet normal -0.630721 0.768426 0.108223 facet normal 0.184688 -0.608831 0.771502 vertex -3.27641 7.90994 5.56266 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: ### Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ``` git clone git@gitlab.com:rsholmes/precadsr.git git submodule init git submodule update Find and replace last few thin traces, fix teardrops and gnd fill f63cfba954 Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation updates the potentiometer pads and thermal vias; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf WLCSP-66, 8x9 raster, 3.767x4.229mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf WLCSP-49, 7x7 raster, 3.141x3.127mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf WLCSP-64, 8x8 raster, 3.357x3.657mm package, pitch 0.65mm VFBGA-86, 6.0x6.0mm, 86 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.35mm; https://datasheets.maximintegrated.com/en/ds/MAX40200.pdf WLP-9, 1.448x1.468mm, 9 Ball, 3x3 Layout, 0.4mm Pitch, https://www.ti.com/lit/ml/mxbg419/mxbg419.pdf, https://www.ti.com/lit/ds/symlink/tmp117.pdf Texas Instruments, DSBGA, 1.5195x1.5195x0.600mm, 8 ball 3x3 area grid, YBG pad definition, https://www.ti.com/lit/ds/symlink/lmg1020.pdf, https://www.ti.com/lit/ml/mxbg078z/mxbg078z.pdf BGA 6 0.4 YFF0006 Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 1924 1 FF1926 FFG1926 FF1927 FFG1927 FFV1927 FF1928 FFG1928 FF1930 FFG1930 Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=294, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=90, NSMD pad definition Appendix A BGA 676 1 FG676 FGG676 Spartan-7 BGA, 14x14 grid, 8x8mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf WLCSP-81, 9x9 raster, 4.039x3.951mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l052t8.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.8mm; https://www.nxp.com/docs/en/package-information/SOT1529-1.pdf.
- For schematics and .ino.
- VCA Probably a straightforward build: one op-amp.
- More (same type, from the side.
- Vertex -5.640343e+000 -2.215887e-001 2.496000e+001 vertex -5.709703e+000 -4.193455e+000.
- (end 162.85 122.845 (end 163.5.