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/VCA/commit/77735c00cc3285131373f5cfc61b82eab5963d12">77735c00cc3285131373f5cfc61b82eab5963d12 Update README.md 83b013c3637bfb179ad62b90a6c8b2f5fb547c8c Update README.md 83b013c3637bfb179ad62b90a6c8b2f5fb547c8c Update README.md * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 Experimenting with more panel layout Initial stab at a 10-step panel layout ideas left_rib_x = thickness * 1.2; right_rib_x = width_mm - h_margin; cv_in = [h_margin, row_1, 0]; audio_out_2 = [right_col, row_1, 0]; pwm_in = [width_mm - h_margin - working_width/8, row_4, 0]; pwm_cv_lvl = [second_col, fifth_row, 0]; pwm_duty = [second_col, second_row, 0]; //Third row interface placement sync_in = [first_col, fourth_row, 0]; //Fifth row interface placement sync_in = [first_col, fourth_row, 0]; triangle_out = [third_col, fourth_row, 0]; pwm_cv_lvl = [second_col, second_row, 0]; //Third row interface placement sync_in = [first_col.

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