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Main synth_tools/Schematics/SynthMages.pretty/6.3mm_NPTH_MAXJLCPCB.kicad_mod 24 lines Binary files /dev/null and b/Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-drl_map.pdf differ eea453f1ee Go to file 55ee65a5e9 Checkpoint after converting most things to SMD Checkpoint after tweaking footprints some more, starting over Fireball/Fireball.kicad_sch | 4 | 100k | Resistor | | | R9, R11, R13 | 3 From afea9d5a2cf23e2a33a2927086270d4d602f5a2b Mon Sep 17 00:00:00 2001 Subject: [PATCH] Delete 'Panels/futura medium bt.ttf' From 496e3e33446b55a1a2a83a967e779b5254a33381 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Gerbers .../precadsr_aux_Gerbers/precadsr-B_Cu.gbr | 518 .../precadsr_aux_Gerbers/precadsr-B_Mask.gbr | 266 .../precadsr_aux_Gerbers/precadsr-F_Paste.gbr | 4 .../precadsr_panel_al.kicad_pcb | 2707 .../Bigger_Push_Switch_Hole.kicad_mod | 17 ...osmo_Panel_Slotted_Mounting_Hole.kicad_mod | 23 (format (units 3) (units_format 1) (precision 4 (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0) keep_text_aligned Add control label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane Updates.

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