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BackLayout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 ; FORMAT={-:-/ absolute / metric / decimal} Schematics/schematic_bugs_v1.txt Normal file Unescape ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole) Total plated holes Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File Panels/luther_triangle_vco.scad Executable file View File Schematics/Fireball.kicad_sch Normal file View File Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-NPTH.drl Normal file Unescape Envelope/Envelope.kicad_sch Normal file Unescape # precadsr.sch BOM Documentation, some cosmetic sh/PCB updates main synth_tools/Schematics/SynthMages.pretty/SOCKET_2_PIN_Header.kicad_mod 44 lines main synth_tools/Schematics/SynthMages.pretty/POT_2_PIN_Header.kicad_mod 44 lines main VCA/Schematics/Dual_VCA.diy 8460 lines From a3d4f2b82eccdd8d29ef9e5db4743697c1bc34dd Mon Sep 17 00:00:00 2001 Subject: [PATCH] More SR1 notation SR 1.pdf Normal file Unescape Dual_VCA.diy Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/PinSocket_1x10_P2.54mm_Vertical.kicad_mod Normal file Unescape // margins from edges h_margin = hole_dist_side + thickness; v_margin = hole_dist_top*2 + thickness; v_margin = hole_dist_top*2 + thickness; right_rib_x = width_mm - h_margin; input_column = h_margin; col_middle = col_left.
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