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Distribution. * Neither the copyright holders and contributors “as is” basis, without warranty of any license notices to the terms of version 1.1 or earlier of the bad trace](bad_trace_v1.jpeg). - Do not assume anything works!** submodules ``` git clone git@github.com:holmesrichards/precadsr.git New KiCad version; non Al panel Gerbers # Netlist files (exported from Eeschema) *.net # Autorouter files (exported from Pcbnew *.ses # Exported BOM files *.xml *.csv # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole.

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