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-0.0817037 -0.0823248 0.993251 vertex -5.77664 -4.28775 7.9152 facet normal -0.714669 0.586516 0.381113 facet normal 0.643709 -0.528256 0.553701 facet normal -0.0815232 -0.828672 0.553766 facet normal 0.714676 0.586516 0.3811 facet normal -1.919712e-02 6.008629e-03 -9.997977e-01 facet normal -0.0761286 -0.0624745 0.995139 vertex 6.94785 2.87789 6.0001 facet normal -0.595618 0.758295 0.265006 facet normal 0.0819177 -0.0822333 -0.993241 facet normal 0.552431 0.109936 -0.826277 vertex 2.68637 -1.0891 18.9321 facet normal -0.388731 -0.815358 0.429045 facet normal -9.407388e-01 3.391319e-01 -3.084939e-04 vertex -1.041734e+02 1.012768e+02 1.055000e+01 vertex -9.758449e+01 1.060913e+02 2.550000e+00 facet normal 0.554793 0.0426235 0.830896 vertex -7.3432 0.499373 6.98393 vertex -5.62591 4.72589 7.07423 facet normal -2.537093e-001 4.349533e-001 8.639718e-001 vertex -1.361138e+000 3.958752e+000 2.491820e+001 facet normal 0.0611117 -0.0769646 -0.995159 facet normal -0.989318 -0.097633 0.108249 facet normal 5.555562e-01 8.314790e-01 -0.000000e+00 facet normal -1.011997e-14 5.429241e-15 -1.000000e+00 d8eca8dc7e Go to file 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane 5e32fb4fc0953f2a10f8dc9cf7a0a3653bcbf4f2 @circuitlocution.com created pull request synth_mages/MK_VCO#5 b554ec2138 Add footprint items for panel holes; separate panel and pcb into different files Fireball/Fireball.kicad_pcb | 2 Synth Mages Power Word Stun Panel.kicad_pcb | 4710 Synth Mages Power Word Stun.kicad_pcb 23480 lines From a3d4f2b82eccdd8d29ef9e5db4743697c1bc34dd Mon Sep 17 00:00:00 2001 eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke Finished PCB, passes all passable DRCs Show-stopping bugs needing bodges: Errant connection between R25 and R1. This needs to be operated in a timely manner, at a 10-step.

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