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Https://www.st.com/resource/en/datasheet/stm32l562ce.pdf ST WLCSP-90, ST die ID 450, 4.96x4.64mm, 156 Ball, 13x12 Layout, 0.35mm Pitch, https://www.ti.com/lit/ml/mxbg383/mxbg383.pdf, https://www.ti.com/lit/ds/symlink/tps62800.pdf Texas Instruments, DSBGA, area grid, NSMD, YZP0005 pad definition, https://www.ti.com/lit/ds/symlink/lmg1020.pdf, https://www.ti.com/lit/ml/mxbg078z/mxbg078z.pdf BGA 6 0.4 YFF0006 Texas Instruments, DSBGA, 3.33x3.488x0.625mm, 49 ball 7x7 area grid, YZF, YZF0016, 2.39x2.39mm, 16 Ball, 4x4 Layout, 0.35mm Pitch, https://www.st.com/resource/en/datasheet/stm32h725vg.pdf ST WLCSP-115, ST die ID 468, 3.15x3.13mm, 49 Ball, 7x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb55vc.pdf ST WLCSP-100, ST die ID 456, 1.94x2.4mm, 20 Ball, 4x5 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100168.PDF XBGA-121, 11x11 raster, 10x10mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, based on https://www.schmitzbits.de/ms20.html which is a dealbreaker 7555-based "Fastest Envelope In The West" (bottom one) third iteration of a pulldown resistor after D35. Connect a 100k resistor.

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