Labels Milestones
Back75 .../precadsr-panel-MaskTop.gts | 75 .../precadsr-panel-PasteBottom.gbp | 15 .../precadsr-panel-PasteTop.gtp | 15 .../PCB/precadsr_Gerbers/precadsr-F_SilkS.gbr | 1166 .../PCB/precadsr_Gerbers/precadsr-NPTH.drl | 17 .../fastestenv_Switch_Hole.kicad_mod | 17 .../fastestenv_LED_Hole.kicad_mod | 17 .../fastestenv_LED_Hole.kicad_mod | 17 .../Kosmo_Switch_Hole.kicad_mod | 17 .../Kosmo_Trimmer_Pot_Hole.kicad_mod | 17 .../PCB/precadsr_aux_Gerbers/precadsr-PTH.drl | 22 Panels/title_test.stl | Bin 0 -> 92229 bytes Panels/FireballSpellSmall.png | Bin 0 -> 11692 bytes { "board": { More tweaks after pro review Apply jlcpcb's design rules, small fixes for those 7022ad9ddb couple more minor clearance tweaks Add ground fills, fix some clearance issues, make all power traces large "rules": { PCB initial layout, no traces "copper_text_size_h": 1.5, "copper_text_size_v": 1.5, "copper_text_thickness": 0.3, PCB initial layout, no.
- Hole, DF13-15P-1.25DSA, 15 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf.
- 1.36x1.86mm, 12 bump 3x4 (area) array, NSMD.