synth_tools

Back

Hardware/PCB/precadsr_aux_Gerbers/precadsr-B_SilkS.gbr create mode 100644 Docs/precadsr_layout_back.pdf (grid_origin 97.28 88.9 Mon 10 May 2021 12:33:34 AM EDT Sat 28 Aug 2021 07:18:14 PM EDT Generated from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 **Component Count:** 77 **Component Count:** 76 Docs/precadsr_layout_back.pdf Normal file Unescape Mon 19 Apr 2021 10:22:18 AM EDT Mon 10 May 2021 12:33:34 AM EDT **Component Count:** 75 0 0 vertex 1.38893 -2.07867 6.7 vertex -1.76777 1.76777 6.5 vertex 1.38893 -2.07867 6.7 vertex 1.76777 -1.76777 6.5 vertex 0 -7.49999 6.0001 vertex -6.92909 2.87012 6.0001 vertex 2.87013 -6.92908 6.0001 vertex -6.92909 2.87011 6.0001 vertex -4.16677 6.23601 6.0001 vertex -2.87012 6.92909 6.0001 vertex 2.87013 6.92908 6.0001 vertex -2.87011 -6.92909 6.0001 vertex.

Ribbon-Cable Connectors, 90814-0006, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf.
Sync (to a clock/gate/trigger input) Quantizer Interfaces.
Strip, HLE-106-02-xx-DV-PE-LC, 6 Pins per row.
0.063585 0.807213 0.586825 vertex 4.4 2.47561.

New Pull Request

Labels Milestones