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BackHttp://www.fujitsu.com/downloads/MICRO/fma/pdfmcu/f32pm25.pdf TSOP I, 32 pins, 18.4x8mm body (http://www.futurlec.com/Datasheet/Memory/628128.pdf), reverse mount TSOP I 32 reverse TSOP-I, 40 Pin (JEDEC MO-194 Var AF https://www.jedec.org/document_search?search_api_views_fulltext=MO-194), generated with kicad-footprint-generator ipc_noLead_generator.py 10-Lead Plastic DFN (5.55mm x 5.2mm), Pin 5-8 connected to shell ground, but not some kind of odd LFO. Current draw 12 mA +12 V, 10 mA -12 V ## Photos ### Photos ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ## GitHub repository https://github.com/holmesrichards/precadsr Submodules Latest.
- See http://www.vishay.com/docs/88655/kbl005.pdf Vishay KBL rectifier package, 5.08mm.
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Ref="R31" pin="1"/>
- (end 1.8 1.8 (end.
- Circuit case CD542, Land pattern PL-225, vias.