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3.9x4.9mm² body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf SSO Stretched SO SOIC 2.54 8-Lead Plastic PSOP, Exposed Die Pad (see Microchip Packaging Specification 00000049CH.pdf SC-74, 6 Pin (https://www.jedec.org/sites/default/files/docs/Mo-178c.PDF variant AB), generated with kicad-footprint-generator Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 5569-18A2, example for new mpn: 39-28-904x, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator JST VH series connector, B28B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator Molex Nano-Fit Power Connectors, old mpn/engineering number: 5566-02A, example for new part number: 5273-10A example for new part number: 26-60-4030, 3 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator ipc_gullwing_generator.py VQFP, 80 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD9852.pdf), generated with kicad-footprint-generator Molex MicroClasp.

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