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205-00070, 5 pins, pitch 5.08mm, size 15.2x8mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO THT Terminal Block WAGO 236-207 45Degree pitch 5mm size 10x9.8mm^2 drill 1.3mm pad 2.6mm terminal block RND 205-00009, 10 pins, dual row male, vertical entry, strain relief clip Harwin LTek Connector, 16 pins, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/44L_VQFN_5x5mm_Dual_Row_%5BS3B%5D_C04-21399a.pdf QFN, 64 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator Molex SPOX Connector System, 43045-2000 (alternative finishes: 43045-160x), 8 Pins (https://www.molex.com/pdm_docs/sd/009652028_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LQFN, 10 Pin (https://www.st.com/resource/en/datasheet/lps25hb.pdf#page=46), generated with kicad-footprint-generator ipc_noLead_generator.py UQFN, 28 Pin (JEDEC MO-153 Var JC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator Molex Sabre Power Connector, 43160-1106, With thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/ Infineon SO package 20pin without exposed pad 8-Lead Plastic Dual Flat, No Lead Package - 9x9 mm Body [QFN] with corner pads and thermal vias; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l151cc.pdf WLCSP-64, 8x8 raster, 3.623x3.651mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00213872.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 3.141x3.127mm package, pitch 0.4mm; see section 6.2 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-100, 10x10, 9x9mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.65mm WLP-4, 2x2 raster, 0.73x0.73mm package, pitch 0.5mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f378vc.pdf WLCSP-72, 9x9 raster, 4x4mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f071v8.pdf WLCSP-63, 7x9 raster, 3.228x4.164mm package, pitch 0.4mm; see section 36.2.3 of http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42363-SAM-D11_Datasheet.pdf WLCSP-56, 7x8 raster, 3.170x3.444mm package, pitch 0.4mm; see section 6.8 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-265, 17x17 raster, 14x14mm package, pitch 0.65mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.65mm VFBGA-86, 6.0x6.0mm, 86 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.5mm; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txs0104e.pdf.

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