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BackB.Cu" "Notes": "Layer B.Mask" "Notes": "Layer B.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.SilkS" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.Paste" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer F.Paste" "Notes": "Layer B.Paste" "Notes": "Layer F.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Cu" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer F.Paste" "Notes": "Layer B.Mask" "Notes": "Layer F.Mask" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:40:31 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes Total unplated holes count 16 Not plated through holes are merged with plated holes Total unplated holes count 16 Not plated through holes are merged with plated holes count 0 Minor layout tweaks merged pull request synth_mages/MK_VCO#2 21e2abea62 Merge pull request synth_mages/MK_VCO#1 cfb5bfb128 Finish schematic, add PDF' (#2) from schematic into main ... Add notes about.
- 0.115847 -6.62301e-05 -0.993267 facet normal -3.544499e-15 -2.713367e-15 1.000000e+00.
- Strip, HLE-110-02-xx-DV-TE, 10 Pins.
- 1.553702e-003 7.524713e-001 vertex -4.097424e+000 1.590920e+000 2.488700e+001 facet normal.
- -1.808076e-04 facet normal 0.295598 -0.346102 0.890413 vertex.