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-07:00 f80e4975fb checkpoint before getting really weird with WireIt A couple more minor clearance tweaks Add ground fills, fix some clearance issues, make all power traces large "rules": { PCB initial layout, no traces "min_copper_edge_clearance": 0.0, PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups d7370bb10c Add tl074 datasheet/pinout Binary files a/3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/SPIDER CLIMB.png' Delete '3D Printing/AD&D 1e spell names in .../Panels/BLADE.

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