Labels Milestones
BackID 460, 2.3x2.48mm, 25 Ball, 5x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g0b1ne.pdf#page=136 ST WLCSP-64, ST die ID 467, 3.09x3.15mm, 52 Ball, X-staggered 21x11 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l562ce.pdf ST WLCSP-90, ST die ID 468, 3.15x3.13mm, 49 Ball, 7x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g051f8.pdf#page=102 ST WLCSP-25, ST die ID 469, 4.02x4.27mm, 81 Ball, 9x9 Layout, 0.5mm Pitch, https://www.adestotech.com/wp-content/uploads/AT25SL321_112.pdf#page=75 WLCSP 12 1.56x1.56 https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMM150-DS001-01.pdf WLCSP-12, 6x4 raster staggered array, 1.403x1.555mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf WLCSP-49, 7x7 raster, 3.89x3.74mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32f042k6.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf WLCSP-64, 8x8 raster, 3.623x3.651mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf WLCSP-49, 7x7 raster, 3.294x3.258mm package, pitch 0.4mm; see section 7.7 of http://www.st.com/resource/en/datasheet/DM00330506.pdf WLCSP-100, 10x10 raster, 4.775x5.041mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.4mm; see section 10.3 of https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf 44-Lead Plastic Quad Flat, No Lead Package (MD) - 4x4x0.9 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf 44-Lead Plastic Quad Flat, No Lead Package, 1.2x1.8x1.55 mm Body with Exposed Pad [eTSSOP] (see Microchip Packaging Specification 00000049CH.pdf SC-74, 6 Pin (https://www.silabs.com/documents/public/data-sheets/Si7020-A20.pdf), generated with kicad-footprint-generator Soldered wire connection, for.
- 2.644445e-15 1.000000e+00 facet normal -8.452844e-01 0.000000e+00 5.343166e-01.
- Normal -1.600428e-001 2.743736e-001 9.482117e-001 vertex 2.123724e+000 -3.645529e+000.
- DSBGA, area grid, YBG pad definition.
- Vertex 5.079590e+000 -2.932274e+000 2.476740e+001 facet normal.
- 0.0386449 vertex -9.06712 -2.79684 6.17308 facet.