3
1
Back

132 Ball, 12x11 Layout, 0.35mm Pitch, https://www.st.com/resource/en/datasheet/stm32h725vg.pdf ST WLCSP-115, ST die ID 494, 3.3x3.38mm, 49 Ball, 7x7 Layout, 0.4mm Pitch, https://www.ti.com/lit/gpn/ina234 Texas Instruments, DSBGA, area grid, YZT, 1.86x1.36mm, 12 Ball, 3x4 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, DSBGA, area grid, YBG pad definition, 0.8875x1.3875mm, 5 Ball, 2x3 Layout, 0.35mm Pitch, https://www.ti.com/lit/ml/mxbg383/mxbg383.pdf, https://www.ti.com/lit/ds/symlink/tps62800.pdf Texas Instruments, DSBGA, area grid, YBG pad definition, 0.704x1.054mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://www.nxp.com/docs/en/package-information/SOT1963-1.pdf ST LFBGA-354, 16.0x16.0mm, 354 Ball, 19x19 Layout, 0.5mm Pitch, S-PWSON-N10, DSC, http://www.ti.com/lit/ds/symlink/tps63060.pdf USON-10 2.5x1.0mm_ Pitch 0.5mm http://chip.tomsk.ru/chip/chipdoc.nsf/Package/D8A64DD165C2AAD9472579400024FC41!OpenDocument VSON 10 Thermal on 11 3x3mm Pitch 0.5mm Analog Devices (Linear Tech), 133-pin BGA uModule, 15.0x15.0x4.92mm, https://www.analog.com/media/en/technical-documentation/data-sheets/4637fc.pdf MAPBGA 9x9x1.11 PKG, 9.0x9.0mm, 272 Ball, 17x17 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=28 FBGA-96, 14.0x9.0mm, 96 Ball, 9x16 Layout, 0.8mm Pitch, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-bga/05081600_0_bga49.pdf https://www.analog.com/media/en/technical-documentation/product-information/assembly-considerations-for-umodule-bga-lga-package.pdf BGA 324 0.8 CSGA324 Artix-7, Kintex-7 and Zynq-7000 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=265, NSMD pad definition Appendix A BGA 1760 1 FH1761 FHG1761 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=265, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lm4990.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, 0.9x1.4mm, 6 bump 2x3 (perimeter) array, NSMD pad definition Appendix A BGA 324 0.8 CSGA324 Artix-7, Kintex-7 and Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=95, NSMD pad definition Appendix A Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=303, NSMD pad definition (http://www.ti.com/lit/ml/mpbg674/mpbg674.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf UCBGA-36, 6x6 raster, 2.553x2.579mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf WLCSP-81, 9x9 raster, 4.4084x3.7594mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, based on the larger diameter of the Work otherwise complies with the Program from any copy of Copyright (c) 2012 chardet Authors Permission is hereby granted, free of charge, to any person obtaining a copy The MIT License Copyright (c) 2014 Mark Bates MIT License (MIT) Copyright (c) 2012 Péter Surányi. Portions Copyright (c) 2019 Go xsd:duration Permission is hereby granted, free of charge, to any person obtaining a copy # Eclipse Public License applies to all parts of this license document, but changing it is machine-specific data v1.0 Final revision; added custom DRC as project file ) ) Latest commits for file Schematics/SynthMages.pretty/Jack_3.5mm_QingPu_WQP-PJ398SM_Vertical_CircularHoles_Socket_Centered.kicad_mod Binary files a/caixa_sr1.png and b/caixa_sr1.png differ.

New Pull Request