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Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape DEF Kosmo_panel_Ground_point_for_NPTH GP 0 40 Y Y 5 N DEF SW_DPDT_x2 SW 0 0 Y N 1 F N DEF SW_Rotary12 SW 0 0 Y N 1 F N DEF SW_MEC_5G SW 0 0 Y N 1 F N DEF SW_Push SW 0 40 Y N 1 F N DEF 2_pin_Molex_header J 0 40 Y Y 1 F N DEF SW_E3_SA3216 SW 0 0 The Power Word Stun.kicad_pro create mode 100644 Synth_Manuals/Kassutronics_Slope_Build_Docs_2.0A-1.pdf create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Wall_wart_A-4118.kicad_mod create mode 100644 Hardware/Panel/precadsr_panel_al/sym-lib-table create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PPTC_RXEF025.kicad_mod create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Jack_Hole.kicad_mod delete mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-PasteBottom.gbp create mode 100644 Fireball/Fireball_panel.kicad_pcb 2666d5803f Footprint selection, some PCB layout choices From c6741b48f0ef8a6e69ecbca1a47bc4f4b481e2a3 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add control label font size to 9mm and align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane Binary files /dev/null and b/3D Printing/Panels/FIREBALL VCO.png and /dev/null differ main synth_tools/Schematics/SynthMages.pretty/PinSocket_1x02_P2.54mm_Vertical.kicad_mod 42 lines synth_tools/PCB Notes.txt 17 lines e8295830c4 STLs, 10hp version, others schematics From 7f9b624c8e1f1f65b5263dc5de76990cc9e84778 Mon Sep 17 00:00:00 2001 Subject: [PATCH 09/13] Notes from debugging Do not assume anything works! Repo uses submodules.

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