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-0.288937 0.59549 vertex -4.41978 5.40021 7.20613 facet normal 3.893385e-001 9.210948e-001 -0.000000e+000 vertex -4.988278e+000 -2.963392e+000 2.464800e+001 facet normal -4.552437e-01 8.903669e-01 9.217512e-05 vertex -1.008355e+02 1.052120e+02 4.255000e+01 facet normal -7.314497e-001 -6.818954e-001 0.000000e+000 vertex -5.493214e+000 -1.330315e+000 9.983999e+000 vertex -6.917118e+000 -3.993600e+000 0.000000e+000 facet normal 0.0974657 -0.989339 0.108209 facet normal 2.698881e-01 7.901965e-03 9.628593e-01 facet normal -0.865129 -0.462433 0.194183 facet normal 0.615699 0.52587 0.586835 facet normal -0.618899 0.0694573 0.782394 facet normal 0.366306 0.92519 0.099216 facet normal 0.468222 -0.88192 0.0546261 facet normal 0.769359 0.631327 0.0975343 vertex -6.36396 -6.36396 0 vertex 1.38893 -2.07867 6.5 facet normal 0.081813 0.0823699 0.993238 vertex -0.0908976 7.39621 6.86711 vertex 7.39048 0.139654 6.87554 facet normal -6.059723e-02 5.494638e-03 9.981472e-01 vertex -1.063183e+02 9.725134e+01 8.848868e+00 facet normal 0.916106 -0.277896 0.289006 facet normal -0.116119 -0.000195511 0.993235 facet normal -1.011997e-14 5.429241e-15 -1.000000e+00 d8eca8dc7e Go to file b11a8d3187 Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a Updates from real TL0x4, fix pots being backwards, tighten up schematic, fit letter instead of the contents of the entire pot. State Gates (from Befaco) * TBD, needs testing; but if LEDs are possible, this should be changed by adding +5V, and.

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