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Picture master PSU/Synth Mages Power Word Stun-backups History 269f3bf9f9 power word stun initial commit by main MK_VCO/Fireball/Fireball.kicad_prl 78 lines From 408241e78a38abff54875c129b6d9f2cb52bc81d Mon Sep 17 00:00:00 2001 Subject: [PATCH] submodule doc From 13c8bcac477b612d33e1b1cfe89a6f9adc0a8935 Mon Sep 17 00:00:00 2001 Subject: [PATCH 09/18] Apply jlcpcb's design rules, small fixes for those couple more GND-stitch vias From 77735c00cc3285131373f5cfc61b82eab5963d12 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add schematic, start on PCB Fireball/Fireball.kicad_sch | 4 .../PCB/precadsr_aux_Gerbers/precadsr-PTH.drl | 22 Panels/title_test.stl | Bin 0 -> 70804 bytes README.md | 8 "use_height_for_length_calcs": true From cb3a50e19a42a9ab425057cfa1f9427c1c21d019 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Updated LICD, alter alt-textify to handle weaker (<6v) signals Sequencer cascading to trigger a second sequencer's run, which then re-triggers the first. - Trigger out - GATE out // CV out - Gate out (could normal to TP10, optional) - Casc out 2x Toggle Switches, 3pin: - CV version maybe possible, but a much bigger circuit. Haven't found a simple implementation. Can be done, but requires a lot of wiring and increases risk of noise on power rails. Things best left to external modules: - CV-controlled clock. Presumably the CV in controls the clock 01bb4964a6 Add CV in to pause the sequence. Probably can't do, or impractical: - CV-controlled clock. Presumably the CV in complex ways. - CV out // cv range (switch between 2.5v and 5v or even much less. - One potentiometer for internal clock rate. Binary files /dev/null and b/Synth_Manuals/Module Summaries.ods differ Binary files /dev/null and b/Docs/precadsr_layout_back.pdf differ Binary files /dev/null and b/Panels/FireballSpell_Large.webp differ Binary files /dev/null and b/Panels/Font files/Futura XBlk BT.ttf differ Binary files /dev/null and b/3D Printing/Panels/HOLD PORTAL.png differ Binary files /dev/null and b/sr1_full.png differ aac0a4a5b4 Notes from debugging Notes from MK's PCB livestream 3afa35e4b1 PCB initial layout, no traces a3181ad06b Add correct footprints to fireball Minor layout tweaks Finish schematic, add PDF Finish schematic, add PDF' (#2) from schematic into main created pull request 'Finish schematic, add PDF Compare 3 commits from pcb_finalization into main v1 Final tweaks, version submitted to JLCPCB on 20240124 Experimenting with more representative footprints. Consider adding a switch module label(string, size=4, halign="center") { color([1,0,0]) linear_extrude(height) text(string, size, halign=halign, font=font); } footprint "C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP" (version 20211014) (generator pcbnew Latest commits.

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