Labels Milestones
BackDesigned using KiCad: http://www.kicad-pcb.org/ # Format documentation: https://kicad.org/help/file-formats/ # Temporary files *.000 *.bak Initial version .gitignore | 16 Docs/precadsr_bom.md | 72 Hardware/PCB/precadsr/potsetc.sch | 4 .../PCB/precadsr_Gerbers/precadsr-F_SilkS.gbr | 128 .../precadsr_panel_al.kicad_pcb | 2510 .../Bigger_Push_Switch_Hole_NPTH.kicad_mod | 18 .../precadsr-panel-art.kicad_mod | 958 .../precadsr-panel-holes.kicad_mod | 208 .../precadsr_panel_al/precadsr_panel_al.pro | 30 .../Panel/precadsr-panel/precadsr-panel.sch | 259 Hardware/Panel/precadsr_panel.png | Bin 0 -> 46787 bytes Datasheets/tl074.pdf | Bin 11675 -> 0 bytes Latest commits for file Images/precadsr-panel-holes.png 972d8b1e07 adds front panel Added schmancy pcb for v1 build Latest commits for file Datasheets/tl074.pdf Add tl074 datasheet/pinout Datasheets/tl074-pinout.jpeg | Bin 9479 -> 14135 bytes caixa_sr2.png | Bin 0 -> 144834 bytes .../Pot_Knobs/pot_knob_two_parts_cap.stl | Bin 0 -> 37432 bytes Panels/futura medium condensed bt.ttf and /dev/null differ main synth_tools/Schematics/SynthMages.pretty/PinSocket_1x02_P2.54mm_Vertical.kicad_mod 42 lines synth_tools/PCB Notes.txt 17 lines Notes from debugging Latest commits for file Panels/title_test_18.stl 0 0 Y N 1 F N DEF SW_DIP_x03 SW 0 40 Y N 1 F N DEF SW_DIP_x12 SW 0 40 Y N 1 F N DEF SW_NKK_GW12LJPCF SW 0 40 Y Y 1 F N DEF 2_pin_Molex_header J 0 40 Y Y 1 F N DEF Vactrol U 0 40 Y Y 1 F N DEF SW_DIP_x05 SW 0 0 Kassutronics Precision ADSR with mods