3
1
Back

Href="https://gitea.circuitlocution.com/ /arrasta/commit/c9e81f0cc630cea052574ce7c50b3e82145bb626" rel="nofollow">c9e81f0cc630cea052574ce7c50b3e82145bb626 Image of caxia score Samurai Latest commits for file Panels/dual_vca.scad T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00.

New Pull Request