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Back48 dd8c61c34f A couple more GND-stitch vias eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke created pull request 'pcb_finalization' (#1) from bugfix/10hp into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/5 Merge pull request 'More schematics' (#3) from schematic into main ... Schematics/Fireball_VCO.pdf Normal file View File Schematics/Luthers_VCO_schematic.pdf Normal file Unescape Schematics/Enlarge/Enlarge.kicad_pro Normal file View File Synth_Manuals/Module Summaries.ods pushed tag v1.0 to synth_mages/MK_SEQ released Prototype Version 1.0 at synth_mages/MK_SEQ pushed tag v1.0 to synth_mages/precadsr master PSU/Synth Mages Power Word Stun Panel.kicad_pro create mode 100644 Hardware/PCB/precadsr_Gerbers/precadsr-B_Paste.gbr create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Push_button_A-5050.kicad_mod delete mode 100644 SR 1.pdf Normal file View File # Format documentation: https://kicad.org/help/file-formats/ # Temporary files *.lck # Netlist files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape