3
1
Back

"other_line_width": 0.15, PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups afea9d5a2c Final revision; added custom DRC as project file version 1) #Kicad 7 # 2-layer, 1oz copper condition "A.Type == 'pad' && B.Type == A.Type")) # 4-layer condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == 'graphic')")) # edge clearance condition "A.Type == 'track' && B.Type == A.Type.

New Pull Request