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Tiny Tiny RSS entries. # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: https://kicad.org/help/file-formats/ # Netlist files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: ============================================================= 2bb058d5715f395d3571ea05d3008566787a2bdb main MK_SEQ/Schematics/Unseen Servant/Unseen Servant_counter_board_noncanonical.kicad_dru facet normal -0.630119 0.773011 0.0735069 vertex -6.58293 0.759029 7.7465 vertex -4.13938 4.98277 7.73103 facet normal 0.0419323 0.554724 0.830977 facet normal 0.0973573 0.0185138 0.995077 vertex -9.30698 1.4028 20.0916 facet normal -2.890019e-001 4.954580e-001 8.191454e-001 facet normal -3.549285e-14 -9.999999e-01 -3.483137e-04 vertex -9.738442e+01 1.060940e+02 1.855000e+01 facet normal 2.705225e-15 -2.187750e-15 -1.000000e+00 facet normal -1.437971e-001 9.896072e-001 0.000000e+000 vertex -2.690832e+000 -5.005927e+000 2.496000e+001 vertex 2.260702e-001 7.029575e+000 2.496000e+001 vertex -1.239765e-001 7.031019e+000 2.496000e+001 vertex -4.608007e+000 5.307639e+000 2.496000e+001 vertex -3.789330e-001 5.612119e+000 9.983999e+000 vertex -2.013369e+000 5.249184e+000 1.747200e+001 facet normal -6.194752e-01 -7.850162e-01 -3.365870e-04 vertex -1.016811e+02 9.313313e+01 2.550000e+00 facet normal 0.098404 -0.0148568 0.995036 facet normal 0.400391 0.779907 0.481074 facet normal 0.000121792 -0.113541 0.993533 vertex -0.314948 7.31329 6.91056 facet normal -0.586516 0.714669 0.381113 vertex -7.0455 7.0455 2.94279 facet normal 0.262733 -0.257269 0.929938.

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