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Bytes Panels/FireballSpell_Large_bw.png | Bin 38764 -> 0 bytes From d40f7ca1ca9e3e0f97e1dc4f553b9c659940a311 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Initial kicad, images, gitignore for kicad backups d7370bb10c Add tl074 datasheet/pinout Datasheets/tl074-pinout.jpeg | Bin 0 -> 26933738 bytes SNARE_MANUAL.pdf | Bin 0 -> 16369 bytes main MK_SEQ/Schematics/schematic_bugs_v1.md 48 lines Assembly Notes: More notes move bugs to md file to be able to add glide db7d02719b Find and replace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation Add 55k-ish resistor to coarse knob to fix tuning range pushed tag v1.0 to synth_mages/MK_SEQ 18e376c67c Merge pull request 'new_footprints' (#5) from new_footprints into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/5 Merge pull request 'Finish schematic, add PDF' (#2) from schematic into main ... Add jlc constraints DRC; replace order number text 613d1b6f7ef8de710893bbeb40d56c8d26d50247 @circuitlocution.com created pull request 'Fix rail clearance issues, add PCB slot, more options for potentiometer spoke placement' (#1) from pcb_finalization into main pull from: pcb_finalization merge into: synth_mages:main Schematics/Unseen Servant/Unseen Servant Front Panel v1.kicad_pcb Normal file View File // testing futura vs quentincaps in F6 rendering label_font_size = 5; //knob_radius top_row = height - v_margin - title_font; saw_out = [h_margin + working_width/4, row_1, 0]; square_out = [third_col, fourth_row, 0]; //Fifth row interface placement sync_in = [first_col, first_row, 0]; //Second row interface placement f_tune = [width_mm/2 + h_margin, top_row, 0]; f_tune = [width_mm/2 + h_margin, top_row, 0]; scale([.38,.38,-.005]) surface("FireballSpellVertSmaller.png", center=true, invert=false); Am totally not using git correctly From 4fd9d8b7bf20541267f941aa2eacb4afbb30ba6a Mon Sep 17 00:00:00 2001 Subject: [PATCH] A couple more minor clearance tweaks couple more minor clearance tweaks Add ground fills, fix some clearance issues, make all power traces large Added input resistor for sync; placed everything on PCB sandwich, making some final-ish decisions about connecting to front panel 82024e96c9 updated C14 footprint, traces, groundplane updated C5 footprint & tracing; schematic annotation 6523065365 updates the potentiometer pads (i.e. Make the walls; a little bit of margin // Width of module (mm) - Would not change this if you can avoid it. Wait and use in source and binary forms, with or without modifications, and in Source Code Form that is Incompatible With notice described in Section 2.1 of this version of bornier2 simple 3-pin terminal block, pitch 5.0mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/b40r.pdf diode bridge Single phase bridge rectifier case 19x19mm, pitch 12.7mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/pb1000.pdf Single phase bridge rectifier case 15.1x15.1mm, pitch 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html TO-247-3 Vertical RM 5.45mm TO-264-5, Horizontal, RM 1.7mm, staggered type-1, see http://www.ti.com/lit/ds/symlink/lmd18200.pdf TO-220-15, Vertical, RM 1.7mm, IIPAK, I2PAK, see http://pdf.datasheetcatalog.com/datasheet/irf/iris4011.pdf TO-262-5 Horizontal RM 1.7mm.

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