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Top-entry thru-hole 16 pin connector, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F215079%7FY1%7Fpdf%7FEnglish%7FENG_CD_215079_Y1.pdf%7F215079-4 connector TE-Connectivity Micro-MaTch Vertical 1-215079-8 8-215079-18 TE-Connectivity Micro-MaTch female-on-board top-entry thru-hole 4 pin straight chassis connector http://www.te.com/usa-en/product-1-1478204-0.html BNC female PCB mount 4 pin, 1.0mm round THT pads Net tie, 2 pin, 0.5mm square SMD rectangular pad as test Point, diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins diameter 3.0mm z-position of LED center 9.0mm, 2 pins LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins diameter 3.0mm z-position of LED center 1.6mm, 2 pins, pitch 5mm, size 10x10.2mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND THT terminal block Metz Connect Type703_RT10N03HGLU, 3 pins, pitch 5.08mm, see http://www.onsemi.com/pub/Collateral/FFPF10F150S-D.pdf TO-220F-2 Horizontal RM 1.7mm IIPAK I2PAK TO-262-3, Vertical, RM 5.08mm, see https://www.centralsemi.com/PDFS/CASE/TO-220-2PD.PDF TO-220-2 Vertical RM 1.27mm Multiwatt-7 staggered type-1 TO-220F-9, Vertical, RM 1.27mm, staggered type-2 TO-220-9, Vertical, RM 2.54mm, see http://ww1.microchip.com/downloads/en/DeviceDoc/20005685A.pdf TO-247-5 Horizontal RM 5.475mm SOT-93 TO-220-2, Horizontal, RM 2.54mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html TO-247-2 Vertical RM 1.27mm staggered type-2 TO-220F-9 Vertical RM 5.45mm TO-46-2, Pin2 at center of hole, with a rock/reggae rhythm on the larger board underneath the smaller board. #Kicad 7 # 2-layer, 1oz copper condition "A.Type == 'via' && B.Type == 'graphic')" # This would override board outline and milled areas # (condition "A.Type == 'track' && B.Type == A.Type")) # 4-layer condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net == B.Net" (condition "A.Type == 'via' && B.Type == 'graphic')" (condition "A.Type == 'via'" (condition "A.Type == 'pad' && !A.isPlated()" (condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'pad' && B.Type == 'track'" (condition "A.Type == 'via' && B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front.

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