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Back2-layer, 1oz copper condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'")) # drill/hole size condition "A.Type == 'track' && B.Type == A.Type")) # 4-layer condition "A.Type == 'via' && B.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: merged pull request 'Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 **Component Count:** 74 **Component Count:** 77 **Component Count:** 74 **Component Count:** 75 **Component Count:** 77 **Component Count:** 76 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | Tayda | A-553 | | | | Knobs | | R4, R12, R13 | 3 | A1M | Potentiometer | | | Tayda | A-1847 | | | | | | | | | | C3, C4, C11 | 2 | 10k | Resistor | | | S3 | 1 | B20k | Potentiometer | | | S3 | 1 | SW_DPDT_x2 | Switch, single pole double throw, separate symbols