3
1
Back

8-Lead Very Thin Dual Flatpack No-Lead (LZ) - 2x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf 8-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_12_05-08-1695.pdf DF Package; 12-Lead Plastic DFN (7mm x 4mm) (see Linear Technology 05081707_A_DHD16.pdf DH Package; 16-Lead Plastic TSSOP (4.4mm); Exposed Pad (see Microchip Packaging Specification 00000049BS.pdf 20-Lead Plastic Quad Flat, No Lead Package (MF) - 6x5 mm Body [QFN]; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf WLCSP-49, 7x7 raster, 3.417x3.151mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00282249.pdf WLCSP-90, 10x9 raster, 4.223x3.969mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zd.pdf WLCSP-64, 8x8 raster, 3.357x3.657mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf WLCSP-81, 9x9 raster, 3.639x3.971mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, based on the mid surdos.

Examples

Key

REP
Repique
CAX
Caixa
MSD
Mid surdo(s)
BSD
Back surdo (L for low, H for high)
R/L
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