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BackQuentin/Panels' Clock POT is too small for film; is film needed? - Fix R25/R1 connection - One potentiometer per step, to indicate current step. (10) Sockets: CLOCK in // CLOCK out // cv range (sw12 // steps: slider, led, switch (sw1-sw10, rv1-rv10 // mounting holes distance 33.3mm 15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm 15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf 37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf 9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes distance 63.5mm 44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm mounting holes - these gaps reduce heat conduction during soldering ground plane 5e32fb4fc0953f2a10f8dc9cf7a0a3653bcbf4f2 @circuitlocution.com created pull request synth_mages/MK_VCO#2 merged pull request 'Put title box in PDF export' (#4) from schematic into main afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file tstamp 42deceed-4793-4b11-91d8-f336ff75a562) Final revision; added custom DRC as project file Add jlc constraints DRC; replace order number text Fireball/Fireball_panel.kicad_pcb | 3 | 10uF | Polarized capacitor | | | | | | | J2 | 1 | 4.7 uF | Unpolarized capacitor | | | | | | | C3, C4, C10 | 1 | Conn_01x04 | Pin socket, 2.54 mm, 1x10 Pin header, 2.54 mm, 1x2 (see [build notes](build.md)) | | S2 | 1 | Synth_power_2x5 | 2x5 pin shrouded header 2.54 mm spacing