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0.3, PCB initial layout, no traces "silk_text_size_h": 1.0, "silk_text_size_v": 1.0, "silk_text_thickness": 0.15, "silk_text_upright": false, "zones": { "min_clearance": 0.5 } }, updates to rev 2 beta by adding +5V, and both trigger/gate and CV routing f12031bb4117bdc0bfa93734f5e1f978a14297b0 edits README.md file ad96459571a569a983e452184e49702fe8779c4e created pull request 'Finish schematic, add PDF' (#2) from schematic into main ... Footprint "SOCKET_3_PIN_HEADER_NORMAL" (version 20211014) (generator pcbnew footprint "SOCKET_2_PIN_Header" (version 20211014) (generator pcbnew // Width of "dial.

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