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# Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: ============================================================= 2dd0b8c0c736720a0b064bbe1304dc9562beb260 Latest commits for file Fireball/Fireball.kicad_sch Added input resistor for sync; placed everything on PCB with exploratory 8hp layout 2cddc4d62d38c9e1b69839f92a19e7915eecbceb 2d3c489f2acf0f8bdc9cf0fe8c2346d4d07472be More SR1 notation Samurai PSU/Synth Mages Power Word Stun Panel.kicad_prl | 77 Fireball/Fireball_panel.kicad_pro | 6 master PSU/Synth Mages Power Word Stun.kicad_sch 3736 lines From fcf4fb3bc8495c3ea3f97c0ede434011bd3d876e Mon Sep 17 00:00:00 2001 Subject: [PATCH] github url .../PCB/precadsr_Gerbers/precadsr-B_Cu.gbr | 4 README.md | 3 Hardware/Panel/precadsr-panel/fp-lib-table | 1 .

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