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Section 7.7 of http://www.st.com/resource/en/datasheet/DM00330506.pdf WLCSP-100, 10x10 raster, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=266, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0102.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, YZT, 1.86x1.36mm, 12 Ball, 3x4 Layout, 0.5mm Pitch, 0.3mm Ball, http://www.st.com/resource/en/datasheet/stm32l486qg.pdf UFBGA-144, 12x12 raster, 5.24x5.24mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-49, 7x7 raster, 3.294x3.258mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf UFBGA-100, 12x12 raster, 5.24x5.24mm package, pitch 0.8mm; https://www.nxp.com/docs/en/package-information/SOT1529-1.pdf Altera BGA-672 F672 FBGA WLP-15, 3x5 raster, 2.28x3.092mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l052t8.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.8mm Altera BGA-68 M68 MBGA Altera VBGA V81 BGA-81 Altera BGA-100 M100 MBGA 121-ball, 0.8mm BGA (based on standard DIP-4), row spacing 15.24 mm (600 mils 40-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads 40-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads 12-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils 24-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads 18-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads 6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), see https://www.power.com/sites/default/files/product-docs/lnk520.pdf Power Integrations E Package eSIP-7F Flat Package with Heatsink Tab, https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf Power Integrations E Package eSIP-7F Flat Package with Heatsink Tab https://ac-dc.power.com/sites/default/files/product-docs/linkswitch-ph_family_datasheet.pdf SIP4 Footprint for the Program in any patent claim(s), including without limitation the rights conveyed by this software and associated claims and causes of action, whether now known or unknown (including existing as well - Once/Cont 11 Toggle Switches, 3pin: - CV out, with switch for two different ranges (e.g. 0-2.5v / 0-5v Gate out, with switch for two different ranges (e.g. 0-2.5v / 0-5v Gate out, with probably +12v gates. - Variable step count, 1-10 steps possible (with 2-3 extra switch positions to re-use for frequently-swapped positions). - External reset via socket. .

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