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BackOrd*cos(lf1), ord*sin(lf1), h1], [ ird*cos(lf2), ird*sin(lf2), h1], [ 0,0,h2], Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through.
- Length 48.8mm width 25.4mm Vishay TJ8.
- Normal -0.452791 0.137354 0.880973 facet normal -0.106559 -0.137901.
- -5.20733 -2.5504 21.335 facet normal -0.106257.