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4.4 -0.747025 18.8084 facet normal 0.0765948 0.956711 0.280779 facet normal 0.462515 0.449659 0.764125 facet normal 0.0285886 0.0942435 0.995139 vertex -7.5203 0 6.0001 vertex -5.30329 5.30329 6.0001 vertex 6.23601 4.16677 6.0001 vertex 5.30329 5.30329 6.0001 vertex -6.92909 -2.87011 6.0001 vertex 5.30329 5.30329 6.0001 vertex 2.87011 -6.92909 6.0001 vertex -6.23601 4.16678 6.0001 vertex -4.16677 6.23601 6.0001 vertex -2.87011 6.92909 6.0001 vertex 4.16677 -6.23601 6.0001 vertex -7.35588 -1.46317 6.0001 vertex 7.35588 1.46317 6.0001 vertex -6.92908 -2.87013 6.0001 vertex 0 9 3.82299 vertex -10.1904 0 0 Y N 1 F N DEF Vactrol U 0 40 Y N 1 F N DEF SW_SP3T SW 0 0 Y N 1 F N DEF SW_Coded_SH-7010 SW 0 40 Y Y 5 N DEF SW_SPDT SW 0 0 Y N 2 F N DEF SW_Push_LED SW 0 40 Y N 1 F N DEF Kosmo_panel_Mounting_Holes_Slotted H 0 40 Y N 1 F N DEF SW_SPDT SW 0 40 Y N 1 F N DEF LM3900N U 0 40 Y N 3 F N DEF SW_SPST SW 0 40 Y Y 1 F N DEF SW_NKK_GW12LJPCF SW 0 0 Y N 2 F N DEF SW_Coded_SH-7010 SW 0 40 Y N 2 F N DEF SW_Push_SPDT SW 0 0 Yet more ways of pulling comics, alt text and salient bits of blogs into Tiny Tiny RSS entries. # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *-backups *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Autorouter files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes Total unplated holes count 16 Not plated through.

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