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Model .gitignore | 16 Docs/precadsr_bom.md | 3 | 100R | Resistor | | | | J2 | 1 Fireball/Fireball.kicad_pcb | 2 | 1 uF | Polarized capacitor | | Tayda | A-3588 | | | R17, R19 | 3 | A1M | Potentiometer | | | R6, R8 | 2 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with.

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