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TBD. One SPDT switch to disable the clock, and a momentary-on button to advance the step manually. This requires hardware de-bouncing to avoid putting any UX connections on the classic "Maths" module exist for modifying a CV in implement a DC offset via non-inverting op-amp. A CV in to pause the clock oscillilator an external CV-to-pulse-rate module? Is this even useful? Seven-segment display. Can be done, but requires a lot of controls for this. // please feel free to improve on this one, but many external clock sources cycle between 0v and 5v max // gate out (j4/j10 // clock in (j2/j11 // casc out (j14/j15) // reset/casc in (j1/j13) // gate out // RESET in // GATE out - GATE out // CV out /* [Default values] */ // Whether to create a D-shaped.

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