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BackC13 to 10 nF | Unpolarized capacitor | | | | | | | | | | | | S3 | 1 | B20k | Potentiometer | | | | | | | | D3, D4, D5, D6, D7, D8, D9, D10 100V 0.15A standard switching diode, DO-35 | | | | | | | D1, D2 | 2 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes unplated through holes: merged pull request synth_mages/MK_VCO#4 24955050f1 Merge pull request 'Fix rail clearance issues, add PCB slot, more options for potentiometer spoke placement' (#1) from pcb_finalization into main Merge pull request 'Put title box in PDF export' (#4) from schematic by Eeschema 5.1.9-73d0e3b20d~88~ubuntu20.04.1 Generated from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 Generated from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/2 From 972d8b1e0797912e848110b19e1af10ed411bbbb Mon Sep 17 00:00:00.
- -8.314602e-01 -5.555843e-01 3.286856e-04 facet.
- -1.087091e-001 -4.840734e-004 9.940735e-001 vertex 4.244207e+000 -8.356673e-001 2.495526e+001.