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"Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Thu Aug 12 15:59:21 2021 ac58a9eaed checkpoint after roughing out middle PCB Binary files /dev/null and b/Images/precadsr-panel-holes.png differ Binary files /dev/null and b/Images/IMG_6777.JPG differ Binary files /dev/null and b/Docs/precadsr_layout_back.pdf differ Binary files /dev/null and b/Images/IMG_6770.JPG differ Binary files /dev/null and b/Panels/title_test_18.stl differ Binary files /dev/null and b/3D.

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